Reading List
CSc 620: Advanced Execution Systems for Reliable Computing
Collecting Dynamic Information
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Tracing Sequential and Parallel Programs - Sriraman Tallam, Man Zhang
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(**) X. Zhang and R. Gupta,
``Whole Execution Traces and their Applications,''
ACM TACO, 2(3):301-334, Sept. 2005.
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M. Xu, R. Bodik, and M. Hill,
``A Flight Data Recorder for Enabling Full-System Multiprocessor Deterministic Replay,''
ISCA, pages 122-133, 2003.
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(**) S. Narayanasamy, G. Pokam, and B. Calder,
``BugNet: Continuously Recording Program Execution for Determinitic
Replay Debugging,''
ISCA, pages 284-295, 2005.
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(**) S. Narayanasamy, C. Pereira, and B. Calder,
``Recording Shared Memory Dependences Using Strata,''
ASPLOS, 2006.
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Checkpointing/Logging & Replay - Chen Tian, Karthik Ravichandra
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(**) S.M. Srinivasan, S. Kandula, C.R. Andrews, and Y. Zhou,
``Flashback: A Lightweight Extension for Rollback and Deterministic Replay for Software Debugging,''
USENIX Annual Technical Conference, General Track, pages 29-44, 2004.
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Y. Saito,
``Jockey: A User-Space Library For Record-Replay Debugging,''
AADEBUG, pages 69-76, 2005.
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(**) X. Zhang, S. Tallam, and R. Gupta,
``Dynamic Slicing Long Running Programs through Execution Fast Forwarding,''
FSE, November 2006.
Software Testing
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Test Case Generation - Name
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B. Korel,
``Automated Software Test Data Generation,''
TSE, 1990.
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(**) N. Gupta, A.P. Mathur, and M.L. Soffa,
``Automated Test Data Generation Using an Iterative Relaxation Method,''
FSE, November 1998.
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(**) S. Visvanathan and N. Gupta,
``Generating Test Data for Functions With Pointer Inputs,''
ASE, September 2002.
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Dynamic Detection of Invariants - Name
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Concept Analysis - Shengjun Li, Yuyi Chen
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G. Snelting,
``Concept Analysis -- A New Framework for Program Understanding,''
PASTE, 1998.
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(**) T. Ball,
``The Concept of Dynamic Analysis,''
FSE, 1999.
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(**) S. Tallam and N. Gupta,
``A Concept Analysis Inspired Greedy Algorithm for Test Suite Minimization,''
PASTE, 2005.
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G. Snelting and F. Tip,
``Understanding Class Hierarchies Using Concept Analysis,''
TOPLAS, 2000.
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Regression Testing - Dennis Jeffrey
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(**) H. Agrawal, J.R. Horgan, E.W. Krauser, and S. London,
``Incremental Regression Testing,''
ICSM, pages 348-357, 1993.
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(**) D. Jeffrey and N. Gupta,
``Prioritizing Test Cases Using Relevant Slices,''
International Computer Software and Applications Conference, Sept. 2006.
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G. Rothermel and M.J. Harrold,
``A Safe, Efficient Regression Test Selection Technique,''
TOSEM, 1997.
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T. Ostrand and E. Weyuker,
``Using Data Flow Analysis for Regression Testing,''
6th Annual Pacific Northwest Software Quality Conference, 1988. (not available on-line)
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R. Gupta, M.J. Harrold, and M.L. Soffa,
``Program Slicing-based Regression Testing Techniques,''
JSTVR, June 1996.
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Dynamic Impact Analysis - Name
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R.S. Arnold and S.A. Bohner,
``Impact Analysis - Towards a Framework for Comparison,''
ICSM, pages 292-301, 1993.
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A. Orso, T. Apiwattanapong, J. Law, G. Rothermel, M.J. Harrold,
``An Empirical Comparison of Dynamic Impact Analysis Algorithms,''
ICSE, pages 491-500, 2004.
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T. Apiwattanapong, A. Orso, and M.J. Harrold,
``Static and Dynamic Analysis: Efficient and Precise Dynamic Impact Analysis
Using Execute-After Sequences,''
ICSE, pages 432-441, 2005.
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M.K. Ramanathan, A. Grama, and S. Jagannathan,
``Sieve: A Tool for Automatically Detecting Variations Across Program Versions,''
ASE, 2006.
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X. Ren, F. Shah, F. Tip, B.G. Ryder, O. Chesley, and J. Dolby,
``Chianti: A Prototype Change Impact Analysis Tool for Java,''
IBM Tech. Report RC 22983, 2003.
Debugging Techniques
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Dynamic Slicing Based Debugging - Name
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X. Zhang, N. Gupta, and R. Gupta,
``A Study of Effectiveness of Dynamic Slicing in Locating Real Faults,''
Empirical Software Engineering Journal, to appear.
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(**) N. Gupta, H. He, X. Zhang, and R. Gupta,
``Locating Faulty Code Using Failure-Inducing Chops,''
ASE, pages 263-272, Nov. 2005.
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X. Zhang, N. Gupta, and R. Gupta
``Locating Faults Through Automated Predicate Switching,''
ICSE, pages 272-281, May 2006.
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S. Lu, P. Zhou, W. Liu, Y. Zhou, and J. Torellas,
``PathExpander: Architectural Support for Increasing the Path Coverage
of Dynamic Bug Detection,''
MICRO, 2006.
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Comparison Based Debugging - Name
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A. Zeller,
``Yesterday, my program worked. Today, it does not. Why?,''
FSE, pages 253-267, 1999.
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M. Renieris and S. Reiss,
``Fault Localization With Nearest Neighbor Queries,''
ASE, pages 30-39, 2003.
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X. Zhang and R. Gupta,
``Matching Execution Histories of Program Versions,''
ESEC-FSE, pages 197-206, September 2005.
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C. Jaramillo, R. Gupta, and M.L. Soffa,
``Comparison Checking: An Approach to Avoid Debugging of Optimized Code,''
ESEC-FSE, pages 268-284, 1999.
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Statistical Debugging - Name
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(**) X. Zhang, N. Gupta, and R. Gupta
``Pruning Dynamic Slices With Confidence,''
PLDI, pages 169-180, June 2006.
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B. Liblit, M. Naik, A.X. Zheng, A. Aiken, M.I. Jordan,
``Scalable Statistical Bug Isolation,''
PLDI, pages 15-26, 2005.
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L. Fei, K. Lee, F. Li, and S.P. Midkiff,
``Argus: Online Statistical Bug Detection,''
FASE, pages 308-323, 2006.
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Z. Li, S. Lu, S. Myagmar, and Y. Zhou,
``CP-Miner: A Tool for Finding Copy-paste and Related Bugs in Operating System Code,''
OSDI, 2004.
Surviving Failures
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Failure Oblivious Computing - Name
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M.C. Rinard, C. Cadar, D. Dumitran, D.M. Roy, T. Leu, and W.S. Beebee,
``Enhancing Server Availability and Security Through Failure-Oblivious Computing,''
OSDI, pages 303-316, 2004.
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F. Qin, J. Tucek, J. Sundaresan, and Y. Zhou,
``Rx: Treating Bugs as Allergies - A Safe Method to Survive Software Failures,''
SOSP, pages 235-248, 2005.
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B. Demsky and M.C. Rinard,
``Data Structure Repair Using Goal-directed Reasoning,''
ICSE, pages 176-185, 2005.
Security
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Information Flow Analysis I - Name
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A. Sabelfeld and A.C. Myers,
``Language-Based Information-Flow Security,''
IEEE Journal on Selected Areas in Communications, 21(1):1-15, Jan. 2003.
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F. Qin, H. Chen, Z. Li, Y. Zhou, H-S. Kim, and Y. Wu,
``LIFT: A Low-Overhead Practical Information Flow Tracking System for Detecting
General security Attacks,''
MICRO, 2006.
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D. Leon, W. Masri, and A. Podgurski,
``An Empirical Evaluation of Test Case Filtering Techniques Based on Exercising
Complex Information Flows,''
ICSE, pages 412-421, 2005.
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Information Flow Analysis II - Vijayanand Nagarajan, Bhavin Mankad
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(**) N. Vachharajani, M.J. Bridges, J. Chang, R. Rangan, G. Ottoni, J.A. Blome, G.A. Reis,
M. Vachharajani, and D.I. August,
``RIFLE: An Architectural Framework for User-Centric Information-Flow Security,''
MICRO, pages 243-254, 2004.
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J.R. Crandall and F.T. Chong,
``Minos: Control Data Attack Prevention Orthogonal to Memory Model,''
MICRO, pages 221-232, 2004.
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(**) G.E. Suh, J.W. Lee, D. Zhang, and S. Devadas,
``Secure Program Execution via Dynamic Information Flow Tracking,''
ASPLOS, pages 85-96, 2004.
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Secure Processors I - Name
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(**) D. Lie, C. Thekkath, M. Mitchell, P. Lincoln, D. Boneh, J. Mitchell, and M. Horowitz,
``Architectural Support for Copy and Tamper Resistant Software,''
ASPLOS, pages 168-177, November 2000.
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B. Gassend, G.E. Suh, D.E. Clarke, M. van Dijk, S. Devadas,
``Caches and Hash Trees for Efficient Memory Integrity,''
HPCA, pages 295-306, 2003.
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X. Zhuang, T. Zhang, and S. Pande,
``HIDE: An Infrastructure for Efficiently Protecting Information Leakage
on the Address Bus,''
ASPLOS, pages 72-84, 2004.
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X. Zhuang, T. Zhang, H-H.S. Lee, and S. Pande,
``Hardware Assisted Control Flow Obfuscation for Embedded Processors,''
CASES, 2004.
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Secure Processors II - Lopamudra Sarangi
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(**) G.E. Suh, D.E. Clarke, B. Gassend, M. van Dijk, S. Devadas,
``Efficient Memory Integrity Verification and Encryption for Secure Processors,''
MICRO, pages 339-350, 2003.
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(**) J. Yang, Y. Zhang, and L. Gao,
``Fast Secure Processor for Inhibiting Software Piracy and Tampering,''
MICRO, pages 351-360, 2003.
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W. Shi, H-H.S. Lee, M. Ghosh, C. Liu, and A. Boldyreva,
``High Efficiency Counter Mode Security Architecture via Prediction and Precomputation,''
ISCA, pages 14-24, 2005.
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V. Nagarajan, R. Gupta, and A. Krishnaswamy,
``Compiler-Assisted Memory Encryption for Embedded Processors,''
HiPEAC, 2007.
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Guarding Against Buffer Overflow Exploits - Manish Swaminathan
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M. Drinic and D. Kirovski,
``A Hardware-Software Platform for Intrusion Prevention,''
MICRO, pages 233-242, 2004.
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(**) N. Tuck, B. Calder, and G. Verghese,
``Hardware and Binary Modification Support for Code Pointer Protection From Buffer Overflow,''
MICRO, pages 209-220, 2004.
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L-C. Lam and T-c. Chiueh,
``Checking Array Bound Violation Using Segmentation Hardware,'',
DSN, pages 388-397, 2005.